(Test) Ryzen 9 5950X L3 Cache bandwidth is lower at stock or PBO than fixed frequency.(UPDATE)

Updated: Oct 30, 2021

UPDATE: Talked with a very knowledgeable friend and this could be caused by an AIDA misread, and the higher perf in 3DMark could be caused by the software not pulling the cores out of sleep state correctly (software issue) whereas locked to 4.5 you're going to go from sleep straight to 4.5. Still, unconfirmed, but salt needed.


Okay, so this will be a quickie (I always say that, lol) but as of typing this I can tentatively confirm that the issue that was present a while back (including on Zen2 processors) whereby the L3 cache bandwidth was reported as lower in synthetics (such as AIDA64) when the processor was allowed to run its own frequency (stock, or PBO for example) which would probably be MOST use-cases, is present on a Gigabyte X570 Aorus Pro on BIOS F35D as of 28-10-2021. That's AGESA ComboV2 1.2.0.4 A, with a Ryzen 9 5950X CPU installed.


PBO:















All-core manually set to 4.5 GHz:















Since AIDA64 is a synthetic benchmark, I decided to test this with something else. So I booted up 3DMark Firestrike and ran the Graphics Test 1 at 720p with custom low settings so that it would be entirely CPU bound on my RTX 3090. And indeed, the resulting framerate is 6.7% higher on the all-core manually set to 4.5 result. A small but measurable difference.


3DMark Firestrike results comparison link.


Something something tech, something, if I had to guess this would be to do with the system that runs the CCD/CCX's L3 cache at the speed of the highest clocked core. So, for example, if cores 0-6 are at 4 GHz and core 7 is at 4.8 GHz, then (as far as I know) the entire CCD's 32MB L3 cache should be running at 4.8 GHz. In this case, it would seem that the system that controls that is a bit... borked?


Either way, that's my observation.

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